POLYNOMIAL EVALUATION IN VLSI USING DISTRIBUTED ARITHMETIC

Authors

WP BURLESON

Publication Date

1990

Journal or Book Title

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS

DOI

https://doi.org/10.1109/31.103226

Pages

1299-1304

Volume

37

Issue

10

Recommended Citation

BURLESON, WP, "POLYNOMIAL EVALUATION IN VLSI USING DISTRIBUTED ARITHMETIC" (1990). IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 190.
https://doi.org/10.1109/31.103226