Core Test Wrapper Design to Reduce Test Application Time for Modular SoC Testing
Publication Date
2008
Journal or Book Title
23RD IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT-TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS
DOI
https://doi.org/10.1109/DFT.2008.13
Pages
412-420
Book Series Title
IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Recommended Citation
Yi, H and Kundu, S, "Core Test Wrapper Design to Reduce Test Application Time for Modular SoC Testing" (2008). 23RD IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT-TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS. 904.
https://doi.org/10.1109/DFT.2008.13
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