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ORCID
N/A
Access Type
Open Access Thesis
Document Type
thesis
Degree Program
Electrical & Computer Engineering
Degree Type
Master of Science in Electrical and Computer Engineering (M.S.E.C.E.)
Year Degree Awarded
2014
Month Degree Awarded
September
Abstract
A novel method for on-chip noise characterization of mm-wave circuits is presented. Different available methods for noise measurements and requirements for on-chip noise mea-surements are studied. The Y-factor method is chosen to be the more suitable method for in-situ applications since it does not require absolute measurements. A state of the art CMOS noise source is implemented in 32nm SOI CMOS technology to enable the in-situ noise measurements of a 20-35 GHz reconfigurable low noise amplifier. Measurement results show that the ENR of the noise source is repeatable enough so that the calibration of the noise source is only required for one integrated circuit. Using different scenarios for the noise figure response of the LNA, the performance of the noise source is evaluated. To the authors’ knowledge, this is the first time that an on-chip CMOS noise source is used for in-situ noise characterization of mm-wave frequency circuits.
DOI
https://doi.org/10.7275/6050905
First Advisor
Joseph C Bardin
Recommended Citation
Ghadiri Sadrabadi, Mohammad, "Novel Method for Broadband On-Chip Noise Characterization" (2014). Masters Theses. 132.
https://doi.org/10.7275/6050905
https://scholarworks.umass.edu/masters_theses_2/132