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Electron mobility calculations in silicon, germanium, and III -V substrates with high-κ gate dielectrics

Terrance P O'Regan, University of Massachusetts Amherst

Abstract

With the continued scaling down of MOSFET dimensions has come the introduction of high-κ gate insulators, high mobility substrates, and new device geometries. The purpose of this work is to model the low-field electron mobility to evaluate the performance of the various options to continue Moore's Law. We model the electron mobility in Si, Ge, and III-V inversion layers and quantum wells, including scattering with surface optical phonons associated with high-kappa gate insulators, bulk phonons, and surface roughness scattering. We compare the low-field mobility results with Monte Carlo simulations to understand the role of mobility in predicting device performance in short-channel devices. For the first time, the theory describing surface optical phonon scattering is extended to the symmetric double-gate structure with a Si body - accounting for the coupling of the two interfaces and screening via the substrate plasmon.

Subject Area

Electrical engineering

Recommended Citation

O'Regan, Terrance P, "Electron mobility calculations in silicon, germanium, and III -V substrates with high-κ gate dielectrics" (2008). Doctoral Dissertations Available from Proquest. AAI3325153.
https://scholarworks.umass.edu/dissertations/AAI3325153

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