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Date of Award

5-2010

Document Type

Campus Access

Degree Name

Doctor of Philosophy (PhD)

Degree Program

Electrical and Computer Engineering

First Advisor

Omid Oliaei

Second Advisor

Robert W. Jackson

Third Advisor

Patrick A. Kelly

Subject Categories

Electrical and Computer Engineering

Abstract

This research work focuses on the advantages and challenges of using a multibit quantizer within the loop of an Incremental Data Converter. Substituting the commonly used single-bit quantizer (simply one comparator) with a multibit quantizer, allows for significantly faster conversion times, reduced signal swings and increased input signal range. Therefore the multibit incremental data converter takes advantage of significantly lowered energy per conversion, longer device battery life and improved Figure of Merit.

This work explains some of the major challenges that accompany the usage of multibit quantizers in the loop and suggests methods and solutions to overcome these challenges, therefore making the implementation of multibit incremental data converters a possibility. Additionally, the required theoretical background, top-level and circuit-level design details and measurement results of a programmable third-order 3-bit incremental data converter are provided as a proof of concept. The measurements show that the 3-bit incremental data converter can achieve an accuracy of as high as 18 bits, while consuming as little as 390μW resulting in an energy-per-conversion orders of magnitude lower than state-of-the-art and significantly improved figure of merit.

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