Combining 2-level logic families in grid-based nanoscale fabrics

Authors

T Wang
P Narayanan
CA Moritz

Publication Date

2007

Journal or Book Title

2007 IEEE INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURE

DOI

https://doi.org/10.1109/NANOARCH.2007.4400864

Pages

101-108

Recommended Citation

Wang, T; Narayanan, P; and Moritz, CA, "Combining 2-level logic families in grid-based nanoscale fabrics" (2007). 2007 IEEE INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURE. 1013.
https://doi.org/10.1109/NANOARCH.2007.4400864