Robust multi-level current-mode on-chip interconnect signaling in the presence of process variations

Authors

V Venkatraman
W Burleson

Publication Date

2005

Journal or Book Title

6th International Symposium on Quality Electronic Design, Proceedings

DOI

https://doi.org/10.1109/ISQED.2005.107

Pages

522-527

Recommended Citation

Venkatraman, V and Burleson, W, "Robust multi-level current-mode on-chip interconnect signaling in the presence of process variations" (2005). 6th International Symposium on Quality Electronic Design, Proceedings. 141.
https://doi.org/10.1109/ISQED.2005.107