Synchro-tokens: A deterministic GALS methodology for chip-level debug and test
Publication Date
2005
Journal or Book Title
IEEE TRANSACTIONS ON COMPUTERS
DOI
https://doi.org/10.1109/TC.2005.203
Pages
1532-1546
Volume
54
Issue
12
Recommended Citation
Heath, MW; Burleson, WP; and Harris, IG, "Synchro-tokens: A deterministic GALS methodology for chip-level debug and test" (2005). IEEE TRANSACTIONS ON COMPUTERS. 146.
https://doi.org/10.1109/TC.2005.203
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