A reconfigurable, power-efficient adaptive Viterbi decoder

Authors

R Tessier
S Swaminathan
R Ramaswamy
D Goeckel
W Burleson

Publication Date

2005

Journal or Book Title

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

DOI

https://doi.org/10.1109/TVLSI.2004.842930

Pages

484-488

Volume

13

Issue

4

Recommended Citation

Tessier, R; Swaminathan, S; Ramaswamy, R; Goeckel, D; and Burleson, W, "A reconfigurable, power-efficient adaptive Viterbi decoder" (2005). IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 148.
https://doi.org/10.1109/TVLSI.2004.842930