"POLYNOMIAL EVALUATION IN VLSI USING DISTRIBUTED ARITHMETIC" by WP BURLESON

Electrical and Computer Engineering Faculty Publication Series

Title

POLYNOMIAL EVALUATION IN VLSI USING DISTRIBUTED ARITHMETIC

Authors

WP BURLESON

Publication Date

1990

Journal or Book Title

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS

DOI

https://doi.org/10.1109/31.103226

Pages

1299-1304

Volume

Issue

Recommended Citation

BURLESON, WP, "POLYNOMIAL EVALUATION IN VLSI USING DISTRIBUTED ARITHMETIC" (1990). IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 190.
https://doi.org/10.1109/31.103226

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COinS

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