Optimizing Data Flow Graphs to Minimize Hardware Implementation

Authors

D Gomez-Prado
Q Ren
M Ciesielski
J Guillot
E Boutillon

Publication Date

2009

Journal or Book Title

DATE: 2009 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3

DOI

https://doi.org/10.1109/DATE.2009.5090643

Pages

117-122

Book Series Title

Design, Automation and Test in Europe Conference and Expo

Recommended Citation

Gomez-Prado, D; Ren, Q; Ciesielski, M; Guillot, J; and Boutillon, E, "Optimizing Data Flow Graphs to Minimize Hardware Implementation" (2009). DATE: 2009 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3. 191.
https://doi.org/10.1109/DATE.2009.5090643