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SkyBridge 2.0: A Fine-grained Vertical 3D-IC Technology for Future ICs
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Abstract
The continued miniaturization of integrated circuits (ICs) into the deep-nanometer regime, according to the IMEC and IRDS roadmaps, is soon to be driven by the emergence of gate-all-around field effect transistors (GAA FETs), which would replace FinFETs. The dissertation focuses on developing SkyBridge 2.0, an IC technology featuring high density fine-grained 3D integration of vertical gate-all-around nanowire FETs, along with contacts and interconnects, which seeks to solve 3D routing issues. This research endeavor will leverage industry-standard Electronic Design Automation (EDA) tools to devise a custom Design and Technology Co-Optimization (DTCO) flow for the design and evaluation of SkyBridge 2.0. Key components of the DTCO flow include process emulation of standard cells and Static Random Access Memory (SRAM), Technology Computer-Aided Design (TCAD) characterization of vertical nanowire FETs to derive current-voltage (IV) and capacitance-voltage (CV) characteristics, compact modeling for accurate device behavior, RC parasitic extraction for 3D interconnects, and evaluation of performance, power, and area using ring oscillators. The dissertation evaluates the technology's efficiency by comparing SkyBridge 2.0, implemented with 10nm nanowires, with the current 7nm FinFET technology. The study anticipates observing significant improvements in the performance, energy efficiency, and density of logic cells. It also includes the architectural design of 3D SRAM to promote low-power memory designs. The aim is to improve read and write static noise margins, decrease leakage current, and achieve higher density benefits compared to 7nm FinFET technology. The research will incorporate the development of a Bayesian optimization technique tailored for efficient extraction of BSIM-CMG parameters to fit nanowire junctionless transistors and 14nm FinFETs. The effectiveness of the method will be evaluated by the level of fit it achieves with drain current data and capacitance data, striving for a reduction in normalized root mean square error. Overall, this dissertation aims to contribute valuable advances to the IC industry by developing and validating SkyBridge 2.0, a solution for IC miniaturization beyond the current standards, and by enhancing the accuracy of fitting techniques for device parameters. The results are expected to influence both the academic research community and the semiconductor industry at large.
Type
Dissertation (Open Access)
Date
2024-05
Publisher
Degree
Advisors
License
Attribution 4.0 International
License
http://creativecommons.org/licenses/by/4.0/