This work presents an energy efficient adaptive error correction system utilizing the Reed-Solomon errors-and-erasures algorithm, targeted to an Altera Stratix FPGA device. The system adapts to changing channel conditions by reconfiguring the system with different decoders to allow for the lowest possible energy consumption rate that the current channel conditions will allow. A series of energy saving optimizations were applied to a set of previous designs, resulting in a reduction in the energy required to decode a megabit of data of more than 70%. In addition, a new channel model was used to assess the effects of differing reconfiguration rates on codeword error rate, energy consumption, and decoding speed.