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Access Type

Campus-Only Access for Five (5) Years

Document Type


Degree Program

Electrical & Computer Engineering

Degree Type

Master of Science (M.S.)

Year Degree Awarded


Month Degree Awarded



Network-On-Chip (NoC) architecture forms the new design framework in extending single processor to multiprocessor SoC. Similar to other SoCs and systems, NoCs are also susceptible to Denial of Service (DoS) attacks which degrade the performance by limiting the availability of resources to the processing cores. The stability of NoC is maintained by employing hardware monitors to detect illegal/abnormal activity or by congestion aware arbitration to obfuscate and balance the network load. Typical DoS attack model selects a random target resource and injects multiple flooding flits to reduce its functionality. The random DoS attack will not be practically effective on congestion aware NoC as the flooding path flow changes dynamically based on the congestion in network and the same victim node selection will not be effectual on different traffic profiles. Thus this paper proposes an effective DoS attack model to dynamically synthesize the selection of target node in NoC, arbitrating on congestion information. We describe the design and implementation of the proposed attack model and compare the performance degradation for different synthetic traffic profiles against random target selection. We also put forth a novel design of an effective offline congestion aware routing algorithm by exploiting the advantages of deterministic and adaptive routing. The proposed routing technique showed better latency saturation compared to adaptive (DyAD) and deterministic (OE) protocol.


First Advisor

Wayne Burleson