BDD-based logic synthesis for LUT-based FPGAs

Vemuri, NKalla, PTessier, R2024-04-262024-04-262002-0110.1145/605440.605442https://hdl.handle.net/20.500.14394/20787algorithms, design, FPGA, logic synthesis, BDD, decomposition,BDD-based logic synthesis for LUT-based FPGAsarticle