Process variation-aware V-dd assignment technique for repeated interconnects

Authors

I Benito
V Venkatraman
W Burleson

Publication Date

2006

Journal or Book Title

IEEE MWSCAS'06: Proceedings of the 2006 49th Midwest Symposium on Circuits and Systems, Vol II

DOI

https://doi.org/10.1109/MWSCAS.2006.382289

Pages

370-374

Book Series Title

Midwest Symposium on Circuits and Systems Conference Proceedings

Recommended Citation

Benito, I; Venkatraman, V; and Burleson, W, "Process variation-aware V-dd assignment technique for repeated interconnects" (2006). IEEE MWSCAS'06: Proceedings of the 2006 49th Midwest Symposium on Circuits and Systems, Vol II. 135.
https://doi.org/10.1109/MWSCAS.2006.382289